Beyond DRAM and Flash, Part 2: New Memory Technology for the Data Deluge

DRAM and Flash are reaching the end of the road. HPE CTO Martin fink shares what’s next.

In the first part of this article, I argued that the comfortable drumbeat of free progress in memory and storage technologies is coming to an end. The industry needs a step change—new technology that can move us back onto the path of Moore’s Law and give us the ability to work on massive data sets at a price almost everyone can afford.

Our money, as I said before, is literally on the Memristor as a replacement for both DRAM and Flash. In this post, I’ll explain why we made that choice.


Instead of using electrons, Memristors store data using ions. Applying charge to a Memristor moves these ions a tiny distance, resulting in a large, measurable change in resistance that remains the same even when power is lost. Unlike the ephemeral behavior of electrons, ions actually stay where we put them.

We believe Memristors have all the advantages that DRAM and Flash offer in their respective niches with none of the disadvantages. We believe they can be as fast as DRAM and as cheap as Flash while using vastly less energy than either. Most importantly, Memristors can scale. A Memristor is a quite complex stack of thin films, but in terms of forming the pattern on the chip, it is vastly simpler than DRAM or 3D-NAND Flash.

The simplicity lets us scale in multiple dimensions at once. An entire Memristor cell can fit in the shadow of two interconnecting lines on a chip. Chipmakers believe they can make interconnects smaller than 10nm wide[i]. Our researchers believe Memristors can follow suit. 3-D manufacturing is relatively easy: Memristor grids can be stacked several levels high with existing patterning, deposition and etch techniques. Storing multiple bits per cell is also eminently feasible. Add all those techniques together and incredible bit density can be achieved.

What about the alternatives?

The semiconductor industry is working on several other replacement memory technologies. (Interestingly, nearly all of them are nonvolatile. It seems we can all agree on something!) Two technologies that may be technically and commercially viable in the next decade are spin-transfer torque RAM (STT-RAM) and phase-change memory (PCM).

Magnetic Memory

STT-RAM stores data in the orientation of a magnetic field. Each cell has a stack of thin layers that includes a fixed magnet and a free one. You can think of the cell as a pair of bar magnets: If the field in the free layer points in the same direction as the fixed layer, a low resistance state results; if the fields are opposite, a high resistance is produced. The bit of data can be written by applying a pulse of current to flip the orientation of the free magnet (a process called spin-transfer torque). The bit is read by measuring the resistance of the cell.

This process is fast, uses little energy and is nonvolatile, making STT-RAM a candidate for a DRAM replacement. However, data isn’t retained for long enough to make STT-RAM useful for long-term storage. More importantly, STT-RAM doesn’t scale. We don’t believe STT-RAM cells can be made any smaller than DRAM cells and they can’t be stacked on a single die. Furthermore, the magnetic materials used in STT-RAM cells construction aren’t commonly used in chip manufacturing today. Making a leading-edge microchip is a very delicate proposition with several hundred discrete processing steps. All those steps must be carried out perfectly if the chip is to be functional. Clearly, introducing any change at all–let alone exotic materials–makes chipmakers very nervous. This makes STT-RAM very challenging to bring to high-volume chip manufacturing.

In summary, STT-RAM solves one problem but injects several more.

Phase-change Memory

PCM works by heating up a material and then cooling it differently. If you cool it fast, an amorphous glass-like material results. Cooled slowly, there is time for an orderly crystal lattice to form. The crystalline phase has a lower resistance than the amorphous phase, resulting in the ability to store ones and zeros. The phase-change material is a chalcogenide, very similar to what we used to use for the storage layer of CD-ROM disks.

PCM is interesting because it is nonvolatile and can be made fairly dense and energy-efficient. PCM’s main downfall, though, is write time—controlled cooling can’t be done instantaneously. This drawback effectively takes PCM out of the running as a DRAM replacement. On the other hand, this combination of properties makes PCM attractive as a faster, lower-power Flash replacement. But not as attractive as Memristor.

If you look at the table comparing all these memory and storage technologies, it’s pretty clear why we’ve decided to concentrate our efforts on developing Memristors.

Seizing the Opportunity

It’s no secret that we’re working on a new computing architecture called The Machine that has Memristor as a core component. Because Memristors can replace both DRAM and Flash, they can serve as main memory and mass storage. Clearly, we could use Memristor to make a faster, more energy-efficient Flash drive replacement, but why stop there? We’re going to take this opportunity to erase that distinction and merge memory and storage to form Universal Memory. Universal Memory gives us the opportunity to create radically simpler software that can manipulate data sets orders of magnitude larger than we can today. I’ll be diving deeper into the subject of Universal Memory in future posts.

The days of improvements in DRAM and Flash driving increased compute performance without significantly increasing cost may be drawing to a close, but thanks to Memristor technology, Moore’s Law—at least as it applies to memory—is alive and well.


1 Clarke, George et al. Process Scaling in an Increasingly Interconnect Dominated World. 2014 Symposium on VSLI Technology

2 The energy per bit for Flash has a significant range (3 orders of magnitude) as a result of Flash’s need for programmed erases before writes. The number includes read, write and erase. DRAM sustaining energy is not shown.